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LTC6900 Low Power, 1kHz to 20MHz Resistor Set SOT-23 Oscillator
FEATURES
s s s s
DESCRIPTIO
s
s s s s s s s s
One External Resistor Sets the Frequency 1kHz to 20MHz Frequency Range 500A Typical Supply Current, VS = 3V, 3MHz Frequency Error 1.5% Max, 5kHz to 10MHz (TA = 25C) Frequency Error 2% Max, 5kHz to 10MHz (TA = 0C to 70C) 40ppm/C Temperature Stability 0.04%/V Supply Stability 50% 1% Duty Cycle 1kHz to 2MHz 50% 5% Duty Cycle 2MHz to 10MHz Fast Start-Up Time: 50s to 1.5ms 100 CMOS Output Driver Operates from a Single 2.7V to 5.5V Supply Low Profile (1mm) ThinSOTTM Package
The LTC(R)6900 is a precision, low power oscillator that is easy to use and occupies very little PC board space. The oscillator frequency is programmed by a single external resistor (RSET). The LTC6900 has been designed for high accuracy operation (1.5% frequency error) without the need for external trim components. The LTC6900 operates with a single 2.7V to 5.5V power supply and provides a rail-to-rail, 50% duty cycle square wave output. The CMOS output driver ensures fast rise/fall times and rail-to-rail switching. The frequency-setting resistor can vary from 10k to 2M to select a master oscillator frequency between 100kHz and 20MHz (5V supply). The three-state DIV input determines whether the master clock is divided by 1, 10 or 100 before driving the output, providing three frequency ranges spanning 1kHz to 20MHz (5V supply). The LTC6900 features a proprietary feedback loop that linearizes the relationship between RSET and frequency, eliminating the need for tables to calculate frequency. The oscillator can be easily programmed using the simple formula outlined below:
fOSC 100, DIV Pin = V + 20k = 10MHz * , N = 10, DIV Pin = Open N * RSET 1 DIV Pin = GND ,
APPLICATIO S
s s s s s s s s s
Portable and Battery-Powered Equipment PDAs Cell Phones Low Cost Precision Oscillator Charge Pump Driver Switching Power Supply Clock Reference Clocking Switched Capacitor Filters Fixed Crystal Oscillator Replacement Ceramic Oscillator Replacement
, LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
5V 0.1F 10k RSET 2M
RSET vs Desired Output Frequency
10000
Clock Generator
1 2 3 OUT V+ LTC6900 GND SET DIV 4 N=1 1kHz fOSC 20MHz 5 5V, N = 100
1000
/100
RSET (k)
100
OPEN, N = 10
20k fOSC = 10MHz * N * RSET
(
)
10
6900 TA01
1 1k 100k 1M 10M 10k DESIRED OUTPUT FREQUENCY (Hz) 100M
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/10 /1
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LTC6900
ABSOLUTE
(Note 1)
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RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW V+ 1 GND 2 SET 3 4 DIV 5 OUT
Supply Voltage (V +) to GND ........................- 0.3V to 6V DIV to GND .................................... - 0.3V to (V + + 0.3V) SET to GND ................................... - 0.3V to (V + + 0.3V) Operating Temperature Range (Note 8) LTC6900C .......................................... - 40C to 85C LTC6900I ............................................ - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LTC6900CS5 LTC6900IS5 S5 PART MARKING LTZM
S5 PACKAGE 5-LEAD PLASTIC SOT-23
TJMAX = 150C, JA = 256C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL f PARAMETER Frequency Accuracy (Notes 2, 3)
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 2.7V to 5.5V, RL= 5k, CL = 5pF, Pin 4 = V + unless otherwise noted. All voltages are with respect to GND.
CONDITIONS V+ = 5V 5kHz f 10MHz 5kHz f 10MHz, LTC6900C 5kHz f 10MHz, LTC6900I 1kHz f < 5kHz 10MHz < f 20MHz 5kHz f 10MHz 5kHz f 10MHz, LTC6900C 5kHz f 10MHz, LTC6900I 1kHz f < 5kHz V + = 5V V + = 3V
q q q q
MIN
TYP 0.5 2 2 0.5
MAX 1.5 2.0 2.5
UNITS % % % % % % % % % k k %/C %/V % % % ppm/kHr
V+ = 3V
q q
2 20 20 0.004 0.04 0.1 0.2 0.6 300
q q q
1.5 2.0 2.5 400 400 0.1
RSET f/T f/V
Frequency-Setting Resistor Range Freq Drift Over Temp (Note 3) Freq Drift Over Supply (Note 3) Timing Jitter (Note 4)
f < 1.5%
RSET = 63.2k V+ = 3V to 5V, RSET = 63.2k
SET 400k Pin 4 = Open, 20k RSET 400k Pin 4 = 0V, 20k RSET 400k
Pin 4 = V +, 20k R
Long-Term Stability of Output Frequency Duty Cycle (Note 7) V+ IS Operating Supply Range Power Supply Current RSET = 400k, Pin 4 = fOSC = 5kHz V +, R
L=
or Open (DIV Either by 100 or 10) Pin 4 = 0V (DIV by 1), RSET = 20k to 400k V + = 5V V + = 3V V + = 5V V + = 3V
Pin 4 = V +
49 45 2.7
50 50 0.32 0.29 0.92 0.68
51 55 5.5 0.42 0.38 1.20 0.86 0.5
q q q q q V+ - 0.4 q
RSET = 20k, Pin 4 = 0V, RL = fOSC = 10MHz VIH VIL IDIV High Level DIV Input Voltage Low Level DIV Input Voltage DIV Input Current (Note 5) Pin 4 = V + Pin 4 = 0V
V + = 5V V + = 5V
q q
-4
2 -2
4
2
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% % V mA mA mA mA V V A A
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LTC6900
ELECTRICAL CHARACTERISTICS
SYMBOL VOH PARAMETER High Level Output Voltage (Note 5)
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 2.7V to 5.5V, RL= 5k, CL = 5pF, Pin 4 = V+ unless otherwise noted. All voltages are with respect to GND.
CONDITIONS V + = 5V V + = 3V VOL Low Level Output Voltage (Note 5) V + = 5V V + = 3V tr OUT Rise Time (Note 6) V + = 5V V + = 3V tf OUT Fall Time (Note 6) V + = 5V V + = 3V Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: Frequencies near 100kHz and 1MHz may be generated using two different values of RSET (see the Selecting the Divider Setting Resistor paragraph in the Applications Information section). For these frequencies, the error is specified under the following assumption: 20k < RSET 200k. Note 3: Frequency accuracy is defined as the deviation from the fOSC equation. Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to the mean of the period. This specification is based on characterization and is not 100% tested. Also, see the Peak-to-Peak Jitter vs Output Frequency curve in the Typical Performance Characteristics section. Note 5: To conform with the Logic IC Standard convention, current out of a pin is arbitrarily given as a negative value. IOH = - 1mA IOH = - 4mA IOH = - 1mA IOH = - 4mA IOL = 1mA IOL = 4mA IOL = 1mA IOL = 4mA Pin 4 = V+ or Floating, RL = Pin 4 = 0V, RL = Pin 4 = V+ or Floating, RL = Pin 4 = 0V, RL = Pin 4 = V+ or Floating, RL = Pin 4 = 0V, RL = Pin 4 = V+ or Floating, RL = Pin 4 = 0V, RL =
q q q q q q q q
MIN 4.8 4.5 2.7 2.2
TYP 4.95 4.8 2.9 2.6 0.05 0.2 0.1 0.4 14 7 19 11 13 6 19 10
MAX
UNITS V V V V
0.15 0.4 0.3 0.7
V V V V ns ns ns ns ns ns ns ns
Note 6: Output rise and fall times are measured between the 10% and 90% power supply levels. These specifications are based on characterization. Note 7: Guaranteed by 5V test. Note 8: The LTC6900C is guaranteed to meet specified performance from 0C to 70C. The LTC6900C is designed, characterized and expected to meet specified performance from - 40C to 85C but is not tested or QA sampled at these temperatures. The LTC6900I is guaranteed to meet specified performance from - 40C to 85C.
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LTC6900 TYPICAL PERFOR A CE CHARACTERISTICS
Frequency Variation vs RSET
4 3 2
VARIATION (%)
TA = 25C GUARANTEED LIMITS APPLY OVER 20k RSET 400k
VARIATION (%)
1 0 -1 -2 -3 -4 1k 10k
0.25 0 -0.25 -0.50 -0.75
JITTER (%P-P)
TYPICAL HIGH
TYPICAL LOW
100k RSET ()
Supply Current vs Output Frequency
2.0 TA = 25C CL = 5pF
SUPPLY CURRENT (mA)
1.5 /10, 5V /100, 5V 1.0
OUTPUT RESISTANCE ()
0.5 /100, 3V 0 0 1k /10, 3V /1, 3V
10k 100k 1M OUTPUT FREQUENCY (Hz)
4
UW
1M
6900 G01
Frequency Variation Over Temperature
1.00 0.75 0.50 TYPICAL HIGH RSET = 63.4k /1 OR /10 OR /100 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 -20 0 20 40 60 TEMPERATURE (C) 80
6900 G02
Peak-to-Peak Jitter vs Output Frequency
/1, VA = 5V /1, VA = 3V
TYPICAL LOW
/10 /100 1k 10k 100k 1M OUTPUT FREQUENCY (Hz) 10M
6900 G03
-1.00 -40
0
Output Resistance vs Supply Voltage
140 /1, 5V TA = 25C
LTC6900 Output Operating at 20MHz, VS = 5V
V + = 5V, RSET = 10k, CL = 10pF
120 OUTPUT SOURCING CURRENT 100
1V/DIV
80
0V
60 OUTPUT SINKING CURRENT 40
12.5ns/DIV
6900 G06
10M
6900 G04
2.5
3.0
3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V)
5.5
6.0
6900 G05
LTC6900 Output Operating at 10MHz, VS = 3V
V + = 3V, RSET = 20k, CL = 10pF
1V/DIV 0V
25ns/DIV
6900 G07
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LTC6900
PI FU CTIO S
V+ (Pin 1): Voltage Supply (2.7V V+ 5.5V). This supply must be kept free from noise and ripple. It should be bypassed directly to a ground plane with a 0.1F capacitor. GND (Pin 2): Ground. Should be tied to a ground plane for best performance. SET (Pin 3): Frequency-Setting Resistor Input. The value of the resistor connected between this pin and V+ determines the oscillator frequency. The voltage on this pin is held by the LTC6900 to approximately 1.1V below the V+ voltage. For best performance, use a precision metal film resistor with a value between 10k and 2M and limit the capacitance on this pin to less than 10pF. DIV (Pin 4): Divider-Setting Input. This three-state input selects among three divider settings, determining the value of N in the frequency equation. Pin 4 should be tied to GND for the /1 setting, the highest frequency range. Floating Pin 4 divides the master oscillator by 10. Pin 4 should be tied to V+ for the /100 setting, the lowest frequency range. To detect a floating DIV pin, the LTC6900 attempts to pull the pin toward midsupply. Therefore, driving the DIV pin high requires sourcing approximately 2A. Likewise, driving DIV low requires sinking 2A. When Pin 4 is floated, it should preferably be bypassed by a 1nF capacitor to ground or it should be surrounded by a ground shield to prevent excessive coupling from other PCB traces. OUT (Pin 5): Oscillator Output. This pin can drive 5k and/or 10pF loads. Heavier loads may cause inaccuracies due to supply bounce at high frequencies. Voltage transients, coupled into Pin 5, above or below the LTC6900 power supplies will not cause latchup if the current into/ out of the OUT pin is limited to 50mA.
BLOCK DIAGRA
1 RSET IRES 3
V+
SET
VBIAS 2 GND IRES THREE-STATE INPUT DETECT DIV 4
PATENT PENDING
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VRES = (V+ - VSET) = 1.1V TYPICALLY
+
GAIN = 1 MASTER OSCILLATOR MO = 10MHz * 20k * IRES (V + - VSET)
PROGRAMMABLE DIVIDER (N) (/1, 10 OR 100)
OUT V
+
5
-
DIVIDER SELECT
+ -
2A
+ -
GND
2A
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LTC6900
THEORY OF OPERATIO
As shown in the Block Diagram, the LTC6900's master oscillator is controlled by the ratio of the voltage between the V+ and SET pins and the current (IRES) is entering the SET pin. The voltage on the SET pin is forced to approximately 1.1V below V+ by the PMOS transistor and its gate bias voltage. This voltage is accurate to 8% at a particular input current and supply voltage (see Figure 1). A resistor RSET, connected between the V+ and SET pins, "locks together" the voltage (V + - VSET) and current, IRES, variation. This provides the LTC6900's high precision. The master oscillation frequency reduces to:
20k MO = 10MHz * RSET
The LTC6900 is optimized for use with resistors between 10k and 2M, corresponding to master oscillator frequencies between 100kHz and 20MHz. To extend the output frequency range, the master oscillator signal may be divided by 1, 10 or 100 before driving OUT (Pin 5). The divide-by value is determined by the state of the DIV input (Pin 4). Tie DIV to GND or drive it below
1.4 1.3 V + = 5V VRES = V + - VSET 1.2 V + = 3V 1.1 1.0
RSET (k)
0.9 0.8 0.1
1
10 IRES (A)
100
Figure 1. V + - VSET Variation with IRES
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0.5V to select /1. This is the highest frequency range, with the master output frequency passed directly to OUT. The DIV pin may be floated or driven to midsupply to select /10, the intermediate frequency range. The lowest frequency range, /100, is selected by tying DIV to V+ or driving it to within 0.4V of V+. Figure 2 shows the relationship between RSET, divider setting and output frequency, including the overlapping frequency ranges near 100kHz and 1MHz. The CMOS output driver has an on resistance that is typically less than 100. In the /1 (high frequency) mode, the rise and fall times are typically 7ns with a 5V supply and 11ns with a 3V supply. These times maintain a clean square wave at 10MHz (20MHz at 5V supply). In the /10 and /100 modes, where the output frequency is much lower, slew rate control circuitry in the output driver increases the rise/fall times to typically 14ns for a 5V supply and 19ns for a 3V supply. The reduced slew rate lowers EMI (electromagnetic interference) and supply bounce.
10000 1000 /100 /10 /1 100 10
1000
6900 F01
1 1k 10k 100k 1M 10M DESIRED OUTPUT FREQUENCY (Hz) 100M
6900 F02
Figure 2. RSET vs Desired Output Frequency
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LTC6900
APPLICATIO S I FOR ATIO
SELECTING THE DIVIDER SETTING AND RESISTOR The LTC6900's master oscillator has a frequency range spanning 0.1MHz to 20MHz. However, accuracy may suffer if the master oscillator is operated at greater than 10MHz with a supply voltage lower than 4V. A programmable divider extends the frequency range to greater than three decades. Table 1 describes the recommended frequencies for each divider setting. Note that the ranges overlap; at some frequencies there are two divider/resistor combinations that result in the desired frequency. In general, any given oscillator frequency (fOSC) should be obtained using the lowest master oscillator frequency. Lower master oscillator frequencies use less power and are more accurate. For instance, fOSC = 100kHz can be obtained by either RSET = 20k, N = 100, master oscillator = 10MHz or RSET = 200k, N = 10, master oscillator = 1MHz. The RSET = 200k approach is preferred for lower power and better accuracy.
Table 1. Frequency Range vs Divider Setting
DIVIDER SETTING /1 /10 DIV (Pin 4) = GND DIV (Pin 4) = Floating DIV (Pin 4) = V+ FREQUENCY RANGE > 500kHz* 50kHz to 1MHz < 100kHz
/100
*At master oscillator frequencies greater than 10MHz (R SET
< 20k), the LTC6900 may experience reduced accuracy with a supply voltage less than 4V.
After choosing the proper divider setting, determine the correct frequency-setting resistor. Because of the linear correspondence between oscillation period and resistance, a simple equation relates resistance with frequency. 100 10MHz RSET = 20k * , N = 10 N * fOSC 1 (RSETMIN = 10k, RSETMAX = 2M) Any resistor, RSET, tolerance adds to the inaccuracy of the oscillator, fOSC.
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ALTERNATIVE METHODS OF SETTING THE OUTPUT FREQUENCY OF THE LTC6900 The oscillator may be programmed by any method that sources a current into the SET pin (Pin 3). The circuit in Figure 3 sets the oscillator frequency using a programmable current source and in the expression for fOSC, the resistor RSET is replaced by the ratio of 1.1V/ICONTROL. As already explained in the "Theory of Operation," the voltage difference between V + and SET is approximately 1.1V, therefore, the Figure 3 circuit is less accurate than if a resistor controls the oscillator frequency. Figure 4 shows the LTC6900 configured as a VCO. A voltage source is connected in series with an external 20k resistor. The output frequency, fOSC, will vary with VCONTROL, that is the voltage source connected between V + and the SET pin. Again, this circuit decouples the relationship between the input current and the voltage between V + and SET; the frequency accuracy will be degraded. The oscillator frequency, however, will monotonically increase with decreasing VCONTROL.
182kHz TO 18MHz (TYPICALLY 8%) V+ 0.1F 1 2 3 V+ OUT LTC6900 GND SET DIV
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ICONTROL 1A TO 100A
4
N=1
OSC 10MHz * 20k * ICONTROL N 1.1V ICONTROL EXPRESSED IN (A)
Figure 3. Current Controlled Oscillator
V+ 0.1F RSET 20k
1 2 3
VCONTROL 0V TO 1.1V
+ -
OUT V+ LTC6900 GND SET DIV
6900 F04
5
4
N=1
OSC 10MHz * 20k * 1 - VCONTROL N RSET 1.1V TYPICAL fOSC ACCURACY 0.5%, VCONTROL = 0V 8%, VCONTROL = 0.5V
(
)
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Figure 4. Voltage Controlled Oscillator
7
LTC6900
APPLICATIO S I FOR ATIO
POWER SUPPLY REJECTION Low Frequency Supply Rejection (Voltage Coefficient) Figure 5 shows the output frequency sensitivity to power supply voltage at several different temperatures. The LTC6900 has a guaranteed voltage coefficient of 0.1%/V but, as Figure 5 shows, the typical supply sensitivity is twice as low. High Frequency Power Supply Rejection The accuracy of the LTC6900 may be affected when its power supply generates significant noise with a frequency content in the vicinity of the programmed value of fOSC. If a switching power supply is used to power the LTC6900, and if the ripple of the power supply is more than 20mV, make sure the switching frequency and its harmonics are not related to the output frequency of the LTC6900. Otherwise, the oscillator may show additional frequency error. If the LTC6900 is powered by a switching regulator and the switching frequency or its harmonics coincide with the output frequency of the LTC6900, the jitter of the oscillator output may be affected. This phenomenon will become noticeable if the switching regulator exhibits ripples beyond 30mV.
0.15
RSET = 63.2k PIN 4 = FLOATING (/10) FREQUENCY ERROR (%)
FREQUENCY DEVIATION (%)
0.10 25C 0.05 -40C 85C
0
-0.05 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 5.5
6900 F05
Figure 5. Supply Sensitivity
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START-UP TIME The start-up time and settling time to within 1% of the final value can be estimated by tSTART RSET(3.7s/k) + 10s. Note the start-up time depends on RSET and it is independent from the setting of the divider pin. For instance with RSET = 100k, the LTC6900 will settle with 1% of its 200kHz final value (N = 10) in approximately 380s. Figure 6 shows start-up times for various RSET resistors. Figure 7 shows an application where a second set resistor RSET2 is connected in parallel with set resistor RSET1 via switch S1. When switch S1 is open, the output frequency of the LTC6900 depends on the value of the resistor RSET1. When switch S1 is closed, the output frequency of the LTC6900 depends on the value of the parallel combination of RSET1 and RSET2. The start-up time and settling time of the LTC6900 with switch S1 open (or closed) is described by tSTART shown above. Once the LTC6900 starts and settles, and switch S1 closes (or opens), the LTC6900 will settle to its new output frequency within approximately 70s. Jitter The Peak-to-Peak Jitter vs Output Frequency graph, in the Typical Performance Characteristics section, shows the typical clock jitter as a function of oscillator frequency and power supply voltage. The capacitance from the SET pin, (Pin 3), to ground must be less than 10pF. If this requirement is not met, the jitter will increase.
70 60 50 40 30 20 400k 10 0 -10 0 20k 200 400 800 600 TIME AFTER POWER APPLIED (s) 1000
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TA = 25C V+ = 5V
63.2k
Figure 6. Start-Up Time
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LTC6900
APPLICATIO S I FOR ATIO
3V OR 5V S1 RSET1 RSET2 1 2 3 SET DIV V+ GND 4 /100 /10 /1
6900 F07
OUT
5 V+
fOSC = 10MHz * OR fOSC = 10MHz *
LTC6900
( (
20k N * RSET1
20k N * RSET1//RSET2
Figure 7
A Ground Referenced Voltage Controlled Oscillator The LTC6900 output frequency can also be programmed by steering current in or out of the SET pin, as conceptually shown in Figure 8. This technique can degrade accuracy as the ratio of (V+ - VSET) / IRES is no longer uniquely dependent of the value of RSET, as shown in the LTC6900 Block Diagram. This loss of accuracy will become noticeable when the magnitude of IPROG is comparable to IRES. The frequency variation of the LTC6900 is still monotonic. Figure 9 shows how to implement the concept shown in Figure 8 by connecting a second resistor, RIN, between the SET pin and a ground referenced voltage source, VIN. For a given power supply voltage in Figure 9, the output frequency of the LTC6900 is a function of VIN, RIN, RSET and (V+ - VSET) = VRES: fOSC = 10MHz 20k * * N RIN RSET
VIN - V + 1 1 + * RIN VRES 1+ RSET
(
)
V+ 0.1F RSET
1 2 3
V+ GND SET
OUT
5
LTC6900 5V DIV 4 /100 /1
6900 F08
/10
OPEN
IPR
IRES
Figure 8. Concept for Programming via Current Steering
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When VIN = V+, the output frequency of the LTC6900 assumes the highest value and it is set by the parallel combination of RIN and RSET. Also note, the output frequency, fOSC, is independent of the value of VRES = (V+ - VSET) so the accuracy of fOSC is within the data sheet limits. When VIN is less than V+, and expecially when VIN approaches the ground potential, the oscillator frequency, fOSC, assumes its lowest value and its accuracy is affected by the change of VRES = (V+ - VSET). At 25C VRES varies by 8%, assuming the variation of V+ is 5%. The temperature coefficient of VRES is 0.02%/C. By manipulating the algebraic relation for fOSC above, a simple algorithm can be derived to set the values of external resistors RSET and RIN, as shown in Figure 9. 1. Choose the desired value of the maximum oscillator frequency, fOSC(MAX), occurring at maximum input voltage VIN(MAX) V+. 2. Set the desired value of the minimum oscillator frequency, fOSC(MIN), occurring at minimum input voltage VIN(MIN) 0. 3. Choose VRES = 1.1 and calculate the ratio of RIN/RSET from the following:
RIN = RSET
(VIN(MAX) - V + ) - ffOSC((MAX)) (VIN(MIN) - V + ) OSC MIN
(1)
( fOSC(MAX) ) VRES - 1 fOSC(MIN)
- 1 (2)
V+
1
V+ GND SET
OUT
5
+
VRES RIN
fOSC 5V
0.1F RSET 2 3
LTC6900 /100 /1
6900 F09
-
+
VIN
DIV
4
/10
OPEN
-
Figure 9. Implementation of Concept Shown in Figure 8
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LTC6900
APPLICATIO S I FOR ATIO
Once RIN/RSET is known, calculate RSET from: RSET 10MHz 20k = * * N fOSC(MAX)
RIN + VIN(MAX) - V + VRES 1 + RSET R VRES IN RSET
(
)
Example 1: In this example, the oscillator output frequency has small excursions. This is useful where the frequency of a system should be tuned around some nominal value. = 3V, fOSC(MAX) = 2MHz for VIN(MAX) = 3V and Let fOSC(MIN) = 1.5MHz for VIN = 0V. Solve for RIN/RSET by Equation (2), yielding RIN/RSET = 9.9/1. RSET = 110.1k by Equation (4). RIN = 9.9RSET = 1.089M. For standard resistor values, use RSET = 110k (1%) and RIN = 1.1M (1%). Figure 10 shows the measured fOSC vs VIN. The 1.5MHz to 2MHz frequency excursion is quite limited, so the curve of fOSC vs VIN is linear. V+
2.00 1.95 1.90 1.85
fOSC (MHz)
1.75 1.70 1.65 1.60 1.55 1.50 0 0.5 1 1.5 VIN (V) 2 2.5 3
6900 F10
fOSC (kHz)
1.80
RIN = 1.1M RSET = 110k V + = 3V N=1
Figure 10. Output Frequency vs Input Voltage
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Example 2: Vary the oscillator frequency by one octave per volt. Assume fOSC(MIN) = 1MHz and fOSC(MAX) = 2MHz, when the input voltage varies by 1V. The minimum input voltage is half supply, that is VIN(MIN) = 1.5V, VIN(MAX) = 2.5V and V+ = 3V. (3) Equation (2) yields RIN/RSET = 1.273 and Equation (3) yields RSET = 142.8k. RIN = 1.273RSET = 181.8k. For standard resistor values, use RSET = 143k (1%) and RIN = 182k (1%). Figure 11 shows the measured fOSC vs VIN. For VIN higher than 1.5V, the VCO is quite linear; nonlinearities occur when VIN becomes smaller than 1V, although the VCO remains monotonic. Maximum VCO Modulation Bandwidth The maximum VCO modulation bandwidth is 25kHz; that is, the LTC6900 will respond to changes in VIN at a rate up to 25kHz. In lower frequency applications however, the modulation frequency may need to be limited to a lower rate to prevent an increase in output jitter. This lower limit is the master oscillator frequency divided by 20, (fOSC/20). In general, for minimum output jitter the modulation frequency should be limited to fOSC/20 or 25kHz, whichever is less. For best performance at all frequencies, the value for fOSC should be the master oscillator frequency (N = 1) when VIN is at the lowest level.
3000 2500 2000 1500 1000 500 0 0 0.5 1 1.5 VIN (V) 2 2.5 3
6900 F11
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RIN = 182k RSET = 143k V + = 3v N=1
Figure 11. Output Frequency vs Input Voltage
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LTC6900
APPLICATIO S I FOR ATIO
Example 3: V+ = 3V, fOSC(MAX) = 5MHz, fOSC(MIN) = 4MHz, N = 1 VIN(MAX) = 2.5V, VIN(MIN) = 0.5V RIN/RSET = 8.5, RSET = 43.2k, RIN = 365k Maximum modulation bandwidth is the lesser of 25kHz or fOSC(MIN)/20 (4MHz/20 = 200kHz) Maximum VIN modulation frequency = 25kHz Example 4: V+ = 3V, fOSC(MAX) = 400kHz, fOSC(MIN) = 200kHz, N = 10 VIN(MAX) = 2.5V, VIN(MIN) = 0.5V RIN/RSET = 3.1, RSET = 59k, RIN = 182k
PACKAGE DESCRIPTIO
(Reference LTC DWG # 05-08-1635)
0.62 MAX 0.95 REF 2.90 BSC (NOTE 4)
1.22 REF
3.85 MAX 2.62 REF
1.4 MIN
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR
0.20 BSC 1.00 MAX DATUM `A'
0.30 - 0.50 REF 0.09 - 0.20 (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
Maximum modulation bandwidth is the lesser of 25kHz or fOSC(MIN)/20 calculated at N =1 (2MHz/20 = 100kHz) Maximum VIN modulation frequency = 25kHz
Table 2. Variation of VRES for Various Values of RIN || RSET
RIN || RSET (VIN = V +) 20k 40k 80k 160k 320k VRES = Voltage across RSET
Note: All of the calculations above assume VRES = 1.1V, although VRES 1.1V. For completeness, Table 2 shows the variation of VRES against various parallel combinations of RIN and RSET (VIN = V +). Calulate first with VRES 1.1V, then use Table 2 to get a better approximation of VRES, then recalculate the resistor values using the new value for VRES.
U
W
UU
VRES, V + = 3V 0.98V 1.03V 1.07V 1.1V 1.12V
VRES, V + = 5V 1.03V 1.08V 1.12V 1.15V 1.17V
S5 Package 5-Lead Plastic TSOT-23
2.80 BSC
1.50 - 1.75 (NOTE 4)
PIN ONE 0.30 - 0.45 TYP 5 PLCS (NOTE 3)
0.95 BSC
0.80 - 0.90 0.01 - 0.10
1.90 BSC
S5 TSOT-23 0302
6900f
11
LTC6900
TYPICAL APPLICATIO S U
Temperature-to-Frequency Converter
5V RT 100k THERMISTOR C1 0.1F 1 2 3 OUT V+ LTC6900 GND SET DIV 4
6900 TA02
5
fOSC = 10MHz * 20k 10 RT
RT: YSI 44011 800 765-4974
Output Frequency vs Temperature
1400 1200 1000 800 600 400 200 0 -20 -10 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (C)
6900 TA03
MAX TYP MIN
RELATED PARTS
PART NUMBER LTC1799 DESCRIPTION 1kHz to 30MHz ThinSOT Oscillator COMMENTS Identical Pinout, Higher Frequency Operation
6900f LT/TP 0902 2K * PRINTED IN USA
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
FREQUENCY (kHz)
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2002

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